Part II: Quartus Simulation Note: Filenames and folder names carinot contain spaces or special characters other than _ AND MUST START WITH A LETTER Note2: Be sure that project 2 is in its own foider separate from project 1 and that all of your bof and vwi files are in that folder when simulating. 2-input NOR Eates, 2-input XOR and 2 -input XNOR gates in addition to the 4 inverters used to create A ′, B ′, C ′ and D ′ We will use this implementation in our Quartus Circuit in PART II.
Minimize each expression and convert your result to use only 2-input NAND gates. Fill out the 5 KMAPS on the template to find minimal SOP for each output. Remember to include the don't care terms as well.
Using the table abeve, find sum of minterm form for W, X, Y, Z, and V. Fill out the valid-bit for the above code converter.